Event

Hello. My name is Kaneko, a second-year master’s student.

Just a few days ago, “neoSYCL”, an original SYCL implementation developed in this laboratory, was released!

SYCL is a standard developed by the Khronos Group for writing code for heterogeneous architectures.
There are several implementations of SYCL, as described here.
Among them, neoSYCL is the only implementation that supports CPU and NEC’s SX-Aurora TSUBASA (SX-AT) as a processor.

With neoSYCL, processing in heterogeneous systems containing SX-ATs can be written in a single-source program using standard C++.
Please check the neoSYCL page on GitHub for more information.

In addition to SX-AT, my research has also created an extension library to support Intel Field Programmable Gate Array (FPGA), which I plan to research and implement so that it can be published on GitHub.

Hello, this is Ishii of M1.
Summer is gradually approaching, and I am wondering whether I should wear a parka or a short-sleeved one.

In this season, three new third-year students and a research student have arrived at Takizawa Lab. We held a welcome party for them online, so here is a report on it.
This welcome party was also held online, but we would like to do it offline soon…
I hope we can create an environment where the newcomers can feel comfortable. I look forward to working with you from now on!

Hi, this is D1 student Jin Yifan.

The 25th IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 25) was successfully held during April 20-22, 2022.

IEEE COOL Chips is an International Symposium initiated in 1998 to present the advancement of low-power and high-speed chips and systems.
The symposium covers leading-edge technologies in all areas of microprocessors and their applications.
Researchers from around the world participated in this symposium in a hybrid format (on-site in Tokyo and online).
The program is shown here.

I was privileged to be able to present my work as a poster at this symposium.

In fact, because of the epidemic, this was the first time I had the opportunity to participate in this type of academic conference on-site.
I met many enthusiastic researchers and had interesting and valuable discussions with them.

Hello, my name is Ishii, and I started my first year as a master’s student in the spring.

I was interested in the LINE API, so I created an official LINE that can manage access control. It is designed to record entry and exit times and reflect them in a spreadsheet.
I made this line as a personal hobby, and I am very grateful that my lab is able to use it. I have a desire to create various things, so I will continue to enjoy creating something in the future.

Hi, I am Prof. Takizawa. I was invited to various venues as a speaker this academic year. This is clear evidence that our lab is very active and all the lab members have been working hard!

It is difficult to post every presentation to this web site, so I would like to list major presentations I did in the second half of this academic year.

• 2021/11/26: The Current Situation and Future Outlook of Supercomputers (in Japanese) @ Microwave Workshop and Exhibition (MWE2021).
• 2021/12/08: An Update on neoSYCL @ Khronos SYCL Webinar.
• 2021/12/09: Operation and Future of Supercomputer AOBA (in Japanese) @ PC Cluster Consortium Symposium (PCCC21).
• 2021/12/13: One-year experience of operating SX-Aurora TSUBASA and future outlook @ 32nd Workshop on Sustained Simulation Performance (WSSP32).
• 2021/12/16: One-year operation of an SX-Aurora TSUBASA system, Supercomputer AOBA @ NEC Aurora Forum.
• 2021/12/19: Fighting with the Complexity and Diversity of Future HPC Systems (Keynote) @ Parallel and Distributed Computing, Applications, and Technologies (PDCAT 2021).
• 2022/01/14: SYCL programming for collaboration of x86 and friends @ The Intel eXtreme Performance Users Group (IXPUG) Workshop.
• 2022/03/29: A data-driven approach for making better use of compilers @ Conference on Advance Topics and Auto Tuning in High Performance Scientific Computing (ATAT2022).

Hello there. This is Li Jiahao.

22nd International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT) was held from Dec. 17th to 19th. PDCAT is a major forum for scientists, engineers, and practitioners throughout the world to present the latest research, results, ideas, developments and applications in all areas of parallel and distributed computing.

I made a presentation about the performance of neoSYCL.

Hi, this is M2 student Jin Yifan.

The 5th International Conference on High-Performance Computing in Asia-Pacific Region (HPC Asia 2022) was held from January 12th to 14th.

HPC Asia is an international conference series in the Asia Pacific region on HPC technologies, fostering the exchange of ideas, research results, and case studies related to all issues of high-performance computing. The 5th edition, HPC Asia 2022 was held with the motto “Stepping forward to the Post Moore Era together.”

You can find the program here.

In our laboratory, Jin had a poster presentation at poster session #122: Memory-aware Task Mapping for Heterogeneous Multi-Core Systems.

Due to the Covid-19 pandemic, the conference was held in a “fully online” format. The organizers created a Gather space for the poster session. In this special era, it is also interesting to participate in the conference in this form.

Hi, my name is Mike Zielewski. I am a doctoral student in Takizawa laboratory and my studies focus on quantum computing.

Last month I was fortunate enough to be able to present my work at the International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2022).

One thing that I thought was challenging when preparing my presentation was that much of my audience would be unfamiliar with not only the background of my work but also quantum annealing in general. This is because quantum annealing has yet to be widely adopted for practical applications. With this in mind, I realized that I would have to take special care in making the presentation accessible to people of various backgrounds.

I hope that some of the attendees found my presentation interesting enough that they will think about using quantum annealing for their own applications.

Currently, some of the most effective ways of using quantum annealing actually combine it with traditional HPC practices. I’m looking forward to seeing more mature HPC technologies be integrated with quantum annealing to produce results that neither could achieve alone.

Hello there. This is Minglu.

12th International Symposium on Parallel Architectures, Algorithms and Programming (PAAP’21) was held from Dec. 10th to 12th.
PAAP is an international conference for scientists and engineers in academia and industry to present their research results and development activities in all aspects of parallel architectures, algorithms and programming techniques.
You can find the details here. Program

In our lab., Minglu had a presentation at the track05: Big Data Processing and Deep Learning.