2021

Journal papers

  • Mulya Agung, Yuta Watanabe, Henning Weber, Ryusuke Egawa, and Hiroyuki Takizawa, “Preemptive Parallel Job Scheduling for Heterogeneous Systems Supporting Urgent Computing,” IEEE Access, Volume 9, pp. 17557-17571, 2021.
  • Hiroyuki Takizawa, Shinji Shiotsuki, Naoki Ebata, and Ryusuke Egawa, “OpenCL-like offloading with metaprogramming for SX-Aurora TSUBASA,” Parallel Computing, Volume 102, 2021.
  • Tao Yamamoto, So Kazama, Yoshiya Touge, Hayata Yanagihara, Tsuyoshi Toda, Takeshi Yamashita and Hiroyuki Takizawa, “Evaluation of flood damage reduction throughout Japan from adaptation measures taken under a range of emissions mitigation scenarios,” Climatic Change, Volume 165, Number 60, pp. 1-18, 2021.
  • Ayumu Ishizuka, Tsuyoshi Yamashita, Ryusuke Egawa, Tao Yamamot, and So Kazama, “Automatic load balancing using Bayesian optimization for a flood simulation code,” IPSJ Transactions on Advanced Computing Systems (ACS72), 2021 (accepted).

International conference papers (with review)

  • Yinan Ke, Mulya Agung, and Hiroyuki Takizawa, “neoSYCL: a SYCL implementation for SX-Aurora TSUBASA,” International Conference on High Performance Computing in Asia-Pacific Region, pp.50-57, 2021.
  • Jiaheng Liu, Ryusuke Egawa, Mulya Agung, and Hiroyuki Takizawa, “A Conflict-Aware Capacity Control Mechanism for Deep Cache Hierarchy.” poster presentation at 2021 IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 24), 2021.
  • Yuta Sasaki, Ayumu Ishizuka, Mulya Agung and Hiroyuki Takizawa, “Evaluating I/O Acceleration Mechanisms of SX-Aurora TSUBASA,” 2021 IEEE International Parallel & Distributed Processing Symposium Workshops, 2021.

Presentations

  • Satoshi Kaneko, Hiroyuki Takizawa, and Kentaro Sano, “Development of the SYCL interface for FPGA clusters and evaluation of CPU-FPGA collaboration,” IEICE Technical Report(RECONF2021-15), 2021.

Invited Talks

  • Hiroyuki Takizawa, “Evaluating and exploiting the potential of the 2nd-generation SX-Aurora TSUBASA,” The 31st Workshop on Sustaiend Simulation Performance, Online, March 18, 2021.
  • Hiroyuki Takizawa, “Offload programming on a modern heterogeneous vector system,” 2021 Conference on Advanced Topics and Auto Tuning in High-Performance Scientific Computing, National Central University (with online participation), March 19, 2021.

International conferences (with review)

  • Yinan Ke, Mulya Agung, and Hiroyuki Takizawa, “neoSYCL: a SYCL implementation for SX-Aurora TSUBASA,” International Conference on High Performance Computing in Asia-Pacific Region, 2021 (to appear)

2020

Journal papers

  • Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, and Hiroyuki Takizawa, “DeLoc: A Locality and Memory Congestion-aware Task Mapping Method for Modern NUMA Systems,” IEEE Access, Volume 8, pp. 6937 — 6953, Jan. 2020.
  • Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, and Hiroyuki Takizawa. “Online MPI Process Mapping for Coordinating Locality and Memory Congestion on NUMA Systems,” Supercomputing Frontiers and Innovations, Volume 7, Number 1, pp. 71-90, 2020.

International conference papers (with review)

  • Antoniette Mondigo, Tomohiro Ueno, Kentaro Sano, and Hiroyuki Takizawa, “Comparison of direct and indirect networks for high-performance FPGA clusters,” 16th International Symposium on Applied Reconfigurable Computing (ARC2020), 2020.
  • Suhang Jiang, Mulya Agung, Ryusuke Egawa, and Hiroyuki Takizawa, “Task Priority Control for the HPX Runtime System,” 2020 IEEE International Parallel & Distributed Processing Symposium Workshops, 2020.
  • Naoki Ebata, Ryusuke Egawa, Yoko Isobe, Ryoji Takaki, and Hiroyuki Takizawa, “Automatically Avoiding Memory Access Conflicts on SX-Aurora TSUBASA,” 2020 IEEE International Parallel & Distributed Processing Symposium Workshops, 2020.
  • Ryusuke Egawa, Souya Fujimoto, Tsuyoshi Yamashita, Daisuke Sasaki, Yoko Isobe, Yoichi Shimomura, and Hiroyuki Takizawa, “Exploiting the Potentials of the Second Generation SX-Aurora TSUBASA,” The 11th International Workshop on Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS’20), 2020.
  • Naoki Ebata, Yoko Isobe, Ryusuke Egawa, and Hiroyuki Takizawa, “Polymorphic Data Layout for SX-Aurora TSUBASA Vector Engines,” The Eighth International Conference on Computing and Networking (CANDAR), 2020.
  • Jiaheng Liu, Ryusuke Egawa, Mulya Agung, and Hiroyuki Takizawa, “A Conflict-Aware Capacity Control Mechanism for Last-Level Cache,” The Eighth International Conference on Computing and Networking Workshops (CANDARW), 2020.
  • Reo Furuhata, Minglu Zhao, Mulya Agung, Ryusuke Egawa, and Hiroyuki Takizawa, “Improving the accuracy in SpMV implementation selection with machine learning,” The Eighth International Conference on Computing and Networking Workshops (CANDARW), 2020.
  • Minglu Zhao, Reo Furuhata, Mulya Agung, Hiroyuki Takizawa, and Tomoya Soma, “Failure Prediction in Datacenters Using Unsupervised Multimodal Anomaly Detection,” The IEEE BigData 2020, the third international conference on the Internet of Things Data Analytics (IoTDA), 2020.
  • Toshiki Tabeta, Naoto Seki, Akihiro Fujii, Teruo Tanaka and Hiroyuki Takizawa, “An Optimization Technology of Software Auto-Tuning Applied to Machine Learning Software,” International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2020), 2020.
  • Chaoyi Zhang, Ryusuke Egawa, and Hiroyuki Takizawa, “Acceleration of Hyper-Parameter Auto-Tuning with Parallelization and Time Constraints,” International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2020), 2020.
  • Suhang Jiang, Mulya Agung, Ryusuke Egawa, and Hiroyuki Takizawa, “Preliminary Evaluation towards Task Priority Control in HPX,” International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2020), 2020.
  • Michael Ryan Zielewski, Mulya Agung, Ryusuke Egawa and Hiroyuki Takizawa, “Challenges in Solving Scheduling Problems with the D-Wave Quantum Annealer,” The ISC High Performance conference 2020, 2020.
  • Yuta Sasaki, Michael Ryan Zielewski, Mulya Agung, Ryusuke Egawa and Hiroyuki Takizawa, “Quantum Compiler : Automatic Vectorization Assisted by Quantum Annealer,” The ISC High Performance conference 2020, 2020.

Domestic conference papers (with review)

  • Ayumu Ishizuka, Takeshi Yamashita, RYusuke Egawa, Hiroyuki Takizawa, Tao Yamamoto, and So Kazama, “Automatic load balancing using Bayesian optimization for a flood simulation code,” The 4-th cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming (xSIG2020), 2020.

Invited talks

  • Hiroyuki Takizawa, “Early evaluation of the second-generation SX-Aurora TSUBASA,” NEC User Group Meeting, Online, September 24, 2020.
  • Hiroyuki Takizawa, “Operation start of the second-generation SX-Aurora TSUBASA,” NEC SC20 Aurora Forum Webinar Day 1, November 17, 2020.

Awards

  • HPC IN ASIA POSTER AWARD at International Supercomputing Conference (ISC20), Michael Ryan Zielewski, Mulya Agung, Ryusuke Egawa and Hiroyuki Takizawa, “Challenges in Solving Scheduling Problems with the D-Wave Quantum Annealer,” The ISC High Performance conference 2020, 2020.
  • Ayumu Ishizuka, IEEE Computer Society Japan Chapter xSIG Young Researcher Award, “Automatic load balancing using Bayesian optimization for a flood simulation code,” July 2020.
  • Best Paper Award at International Workshop on Large-scale HPC Application Modernization, Reo Furuhata, Minglu Zhao, Mulya Agung, Ryusuke Egawa, and Hiroyuki Takizawa, “Improving the Accuracy in SpMV  Implementation Selection with Machine Learning,” November 2020.

2019

Journal papers

  • Antoniette Mondigo, Tomohiro Ueno, Kentaro Sano, Hiroyuki Takizawa, “Scalability Analysis of Deeply Pipelined Tsunami Simulation with Multiple FPGAs,” IEICE Transactions on Information and Systems, Vol.E102-D,No.5,2019.
  • Toshiki Kamiya, Sachiko Kodera, Kazuma Hasegawa, Ryusuke Egawa, Hiroshi Sasaki, Akimasa Hirata, “Different thermoregulatory responses of people from tropical and temperate zones: A computational study,” Building and Environment, Volume 159, pp.1 — 7, 15 July 2019, 106152.
  • Kenta Yamaguchi, Takashi Soga, Yoichi Shimomura, Thorsten Reimann, Kazuhiko Komatsu, Ryusuke Egawa, Akihiro Musa, Hiroyuki Takizawa, and Hiroaki Kobayashi, Performance evaluation of different implementation schemes of an iterative flow solver on modern vector machines, Supercomputing Frontiers and Innovations, 2019.
  • Sachiko Kodera, Taku Nishimura Essam A.Rashe, Kazuma Hasegawa, Ichiro Takeuchi, Ryusuke Egawa, Akimasa Hirata, “Estimation of Heat-related Morbidity from Weather Data: A Computational Study in Three Prefectures of Japan over 2013–2018,” Environment International 130 (2019), pp. 1 — 9,  104907.

International conference papers (with review)

  • Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, and Hiroyuki Takizawa. The Impacts of Locality and Memory Congestion-aware Thread Mapping on Energy Consumption of Modern NUMA Systems. 2019 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), Yokohama, April 18, 2019.
  • Muhammad Alfian Amrizal, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa, “An Energy Optimization Method for Hybrid In-Memory Checkpointing,” in Proc. of 2019 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), Yokohama, April 18, 2019. (Poster presentation)
  • Yoichi Shimomura, Midori Kano, Takashi Soga, Kenta Yamaguchi, Akihiro Musa, Yusuke Mizuno, Shun Takahashi, Ryusuke Egawa, and Hiroyuki Takizawa “Optimization of a gas-particle flow solver on vector supercomputers,” In The 31st International Conference on Parallel Computational Fluid Dynamics (ParCFD’2019), pages 1-4, June 2019.
  • Praphan Pavarangkoon, Ken T. Murata, Kazunori Yamamoto, Kazuya Muranaga, Takamichi Mizuhara, Keiichiro Fukazawa, Ryusuke Egawa, Takahiro Katagiri, Masao Ogino, Takeshi Nanri, “Performance Improvement of High-Speed File Transfer over JHPCN,” in Proceedings of CBDCom 2019, Fukuoka, Japan.
  • Jens Huthmann, Abiko Shin, Artur Podobas, Kentaro Sano, and Hiroyuki Takizawa. Scaling performance for n-body stream computation with a ring of FPGAs. In The International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART2019), pages 1-6, June 2019.
  • Naoki Ebata, Ryusuke Egawa, Yoko Isobe, Ryoji Takaki, Hiroyuki Takizawa, “Memory First : A Performance Tuning Strategy Focusing on Memory Access Patterns,” Research Poster of ISC2019, Frankfurt, Germany, July 2019.
  • Ryusuke Egawa, Masayuki Sato, Ryoma Saito, Hiroaki Kobayashi,” A Layer-Adaptable Cache Hierarchy by a Multiple-layer Bypass Mechanism,” In The International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART2019), pages 1-6, June 2019, Nagasaki, Japan.
  • Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa and Hiroyuki Takizawa. An Automatic MPI Process Mapping Method Considering Locality and Memory Congestion on NUMA Systems. 2019 IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), Singapore, October 1, 2019.
  • Hiroyuki Takizawa, Shinji Shiotsuki, Naoki Ebata and Ryusuke Egawa, “An OpenCL-like Offload Programming Framework for SX-Aurora TSUBASA,” The 20th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2019), 2019.

2018

Journal papers

  • Kazuya Kojima, Akimasa Hirata, Kazuma Hasegawa, Sachiko Kodera, Ilkka Laakso, Daisuke Sasaki, Takeshi Yamashita, Ryusuke Egawa, Yuka Horie, Nanako Yazaki, Saeri Kowata, Kenji Taguchi, Tatsuya Kashiwa, “Risk Management of Heatstroke Based on Fast Computation of Temperature and Water Loss using Weather Data for Exposure to Ambient Heat and Solar Radiation,” IEEE Access, pp 1 — 10, Jan. 2018. DOI 10.1109/ACCESS.2018.2791962
  • Masayuki Sato, Yoshiki Shoji, Zentaro Sakai, Ryusuke Egawa, and Hiroaki Kobayashi, “An Adjacent-Line-Merging Writeback Scheme for STT-RAM-Based Last-Level Caches,” IEEE trans. on Multi-Scale Computing Systems, VOL. XX, NO. Y, Apr. 2018, DOI: 10.1109/TMSCS.2018.2827955, (Early Access).
  • Hang Cui, Shoichi Hirasawa, Hiroaki Kobayashi, and Hiroyuki Takizawa, “A Machine Learning-based Approach for Selecting SpMV Kernels and Matrix Storage Formats,” IEICE Transactions on Information and Systems, Vol.E101-D, No.9, Sep 2018 (to appear).

International conference papers (with review)

  • Zhen Wang, Ryusuke Egawa, Reiji Suda, Hiroyuki Takizawa., “Auto-tuning of Hyperparameters of Machine Learning Models,” Poster presentation at HPC ASIA, 29 Jan. 2018, Tokyo. (Link: http://sighpc.ipsj.or.jp/HPCAsia2018/poster/post127s2-file1.pdf)
  • Pei Li, Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa, ” Thermal-aware Dynamic Checkpoint Interval Tuning for High Performance Computing,” Poster presentation at HPC ASIA 2018, 29 Jan. 2018, Tokyo. (Link:http://sighpc.ipsj.or.jp/HPCAsia2018/poster/post129s2-file1.pdf)
  • Masayuki Sato, Zehua Li, Ryusuke Egawa, and Hiroaki Kobayashi, “An Energy-aware Set-level Refreshing Mechanism for eDRAM Last-Level Caches,” In Proc. of COOL Chips 21, April 2018.
  • Hiroyuki Takizawa, Kenta Yamaguchi, Takashi Soga, Thorsten Reimann, Kazuhiko Komatsu, Ryusuke Egawa, Akihiro Musa, and Hiroaki Kobayashi, “MIGRATING AN OLD VECTOR CODE TO MODERN VECTOR MACHINES, ” Proceedings of 30th International Conference on Parallel Computational Fluid Dynamics Parallel CFD2018, pp. 1 – 2, April 2018, Indianapolis.
  • Yuki Kawarabatake, Mulya Agung, Kazuhiko Komatsu, Ryusuke Egawa, and Hiroyuki Takizawa, “Use of Code Structural Features for Machine Learning to Predict Effective Optimizations,” 33rd IEEE International Parallel & Distributed Processing Symposium Workshops(IPDPSW), International Workshop on Automatic Performance Tuning, May 25, 2018@Vancouver, Canada.
  • Antoniette Mondigo, Ketnaro Sano, and Hiroyuki Takizawa, ” Performance Estimation of Deeply Pipelined Fluid Simulation on Multiple FPGAs with High-speed Communication Subsystem,” The 29th Annual IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2018), 10-12 July 2018, Milan, Italy.
  • Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa and Hiroyuki Takizawa. A Locality and Memory Congestion-aware Thread Mapping Method for Modern NUMA Systems. ACM/IEEE Supercomputing Conference 2018 (SC18) (poster), Nov 13, 2018.
  • Xiong Xiao, Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa and Hiroyuki Takizawa, “Investigating the Effects of Dynamic Thread Team Size Adjustment for Irregular Applications,” The Sixth International Symposium on Computing and Networking (CANDAR), November 27-30, 2018, Hida Takayama, Japan.
  • Kenya Yamada, Takahiro Katagiri, Hiroyuki Takizawa, Kazuo Minami, Mitsuo Yokokawa, Toru Nagai and Masao Ogino, “Preconditioner auto-tuning with deep learning for sparse iterative algorithms,” The Sixth International Symposium on Computing and Networking (CANDAR), November 27-30, 2018, Hida Takayama, Japan.
  • Antoniette Mondigo, Ketnaro Sano, and Hiroyuki Takizawa, “Enhancing Memory Bandwidth in a Single Stream Computation with Multiple FPGAs,” The 2018 International Conference on Field-Programmable Technology (FPT’18), December 10 – 14, 2018, Naha, Japan.
  • Zhen Wang, Agung Mulya, Ryusuke Egawa, Reiji Suda, and Hiroyuki Takizawa, “Automatic Hyperparameter Tuning of Machine Learning Models under Time Constraints,” IEEE BigData 2018 workshop, The Second International Workshop on Automation in Machine Learning and Big Data (AutoML 2018), December 13, 2018, Seattle, WA, USA.

Invited talks

  • Ryusuke Egawa, “HPC Benchmarking; Perspective from Power and Sustained Performance,” SIAM Conference on Parallel Processing for Scientific Computing, Mar. 2018, Tokyo.
  • Hiroyuki Takizawa, “User-Defined Code Transformation for Separation of Performance-Awareness from Application Codes,” SIAM Conference on Parallel Processing for Scientific Computing, Mar. 2018, Tokyo.
  • Ryusuke Egawa, “Job Run-time Estimation toward Energy-aware System Operation,” 27th Workshop on Sustained Simulation Performance, 23 Mar. 2018, Sendai.
  • Hiroyuki Takizawa, “Towards prediction of effective optimizations in performance engineering,” 27th Workshop on Sustained Simulation Performance, 23 Mar. 2018, Sendai.
  • Hiroyuki Takizawa, Muhammad Alfian Amrizal, Kazuhiko Komatsu, and Ryusuke Egawa, “Automatic Parameter Tuning of Application-Level Incremental Checkpointing,” 2018 Conference on Advanced Topics and Auto Tuning in High-Performance Scientific Computing (ATAT in HPSC 2018), March 27, 2018.

Presentations

  • Hiroyuki Takizawa, Thorsten Reimann, Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Akihiro Musa, and Hiroaki Kobayashi, “Expressing the Differences in Code Optimizations between Intel Knights Landing and NEC SX-ACE Processors,” the 13th World Congress on Computational Mechanics/2nd Pan American Congress on Computational Mechanics, New York City, July 22-27, 2018.

2017

Journal papers

  • Ryusuke Egawa, Kazuhiko Komatsu, Shintaro Momose, Yoko Isobe, Akihiro Musa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Potential of a modern vector supercomputer for practical applications: performance evaluation of sx-ace. The Journal of Supercomputing, pages 1-29, 2017.
  • Wataru NISHIO, Sachiko KODERA, Akimasa HIRATA, Daisuke SASAKI, Takeshi YAMASHITA, Ryusuke EGAWA, Hiroaki KOBAYASHI, and Hideaki SONE, ”Accelerating Risk Assessment of Heat Stroke for Human Exposure to Ambient Heat and Solar Radiation Using Vector Supercomputer SX-ACE,”  IEICE trans, oc Electronics, Vol.J100-C, No.5, pp.208-216, April, 2017. (in Japanese)
  • Yuta Sakaguchi, Kenryo Kataumi, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Kazuhiko Komatsu, Ryusuke Egawa, Hiroaki Kobayashi, and Satoru Yamamoto. Program optimization of numerical turbine for vector supercomputer sx-ace. Computers & Fluids, 2017, (accepted).
  • Xiong Xiao, Shoichi Hirasawa, Hiroyuki Takizawa and Hiroaki Kobayashi, “Toward Dynamic Load Balancing across OpenMP Thread Teams for Irregular Workloads,” International Journal of Networking and Computing, Volume 7, Number 2, pages 387-404, July 2017.
  • Muhammad Alfian Amrizal, Atsuya Uno, Yukinori Sato, Hiroyuki Takizawa, and Hiroaki Kobayashi, “Energy-Performance Modeling of Speculative Checkpointing for Exascale Systems,” the IEICE Transactions, Vol.E100-D,No.12, 2017.

International conference papers (with review)

  • Mulya Agung, Muhammad Alfian Amrizal, Kazuhiko Komatsu, Ryusuke Egawa, and Hiroyuki Takizawa, “A Memory Congestion-aware MPI Process Placement for Modern NUMA Systems,” the 24th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC2017), Jaipur, India, 2017.
  • Masayuki Sato, Zentaro Sakai, Ryusuke Egawa and Hiroaki Kobayashi, “An Adjacent-Line-Merging Writeback Scheme for STT-RAM Last-Level Caches,” In Proceedings of IEEE Symposium on Low-Power and High-Speed Chips, April 2017.
  • Takuya Toyoshima, Masayuki Sato, Ryusuke Egawa and Hiroaki Kobayashi, “An Application-adaptive Data Allocation Method for Multi-channel Memory,” In Proceedings of IEEE Symposium on Low-Power and High-Speed Chips, April 2017.
  • Takashi Soga, Kenta Yamaguchi, Raghunandan Mathur, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi, “Effects of Using a Memory-Stalled Core for Handling MPI Communication Overlapping in The SOR Solver,” Proceedings of The 29th International Conference on Parallel Computational Fluid Dynamics (ParallelCFD 2017), pp.1-2, USB.
  • Jubee Tada, Masayuki Sato and Ryusuke Egawa, “An Adaptive Demotion Policy for High-Associativity Caches,” International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART 2017), pp.1-6, USB.
  • Hiroyuki Takizawa, Daichi Sato, Shoichi Hirasawa and Daisuke Takahashi,”A Customizable Auto-Tuning Scenario with User-defined Code Transformations,” 32nd IEEE International Parallel & Distributed Processing Symposium Workshops(IPDPSW), The Twelfth International Workshop on Automatic Performance Tuning, 2017.
  • Muhammad Alfian Amrizal and Hiroyuki Takizawa, “Optimizing Energy Consumption on HPC Systems with a Multi-level Checkpointing Mechanism,” The 12th International Conference on Networking, Architecture, and Storage (NAS 2017), 2017.
  • Ryusuke Egawa, Kazuhiko Komatsu, Yoko Isobe, Toshihiro Kato, Souya Fujimoto, Hiroyuki Takizawa, Akihiro Musa and Hiroaki Kobayashi, Performance and Power Analysis of SX-ACE using HP-X Benchmark Programs, Proceedings of IEEE International Conference on Cluster Computing 2017, pp. 693 – 700, Sep. 2017.
  • Hiroyuki Takizawa, Thorsten Reimann, Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Akihiro Musa and Hiroaki Kobayashi, “Vectorization-aware Loop Optimization with User-defined Code Transformations, Proceedings of IEEE International Conference on Cluster Computing 2017, pp. 685 – 692, Sep. 2017.

Invited talks

  • Hiroyuki Takizawa, “A User-Defined Code Transformation Approach to Separation of Performance Concerns,” Invited Talk at the First Workshop on Software Challenges to Exascale Computing (SCEC2017), Jaipur, India, 2017.
  • Kazuhiko Komatsu, “Directive Translation Approach in Keeping a Code Clean,” 2017 Conference on Advanced Topics and Auto Tuning in High-Performance Scientific Computing (ATAT in HPSC 2017), March 11, 2017.
  • Ryusuke Egawa, “An HPC Refactoring Catalog – Accumulating Know-Hows of Sytem Specific Optimization and its Practical Usage,” 2017 Conference on Advanced Topics and Auto Tuning in High-Performance Scientific Computing (ATAT in HPSC 2017), March 12, 2017.
  • Hiroyuki Takizawa, “Combining Autotuning and Code Transformations,” 2017 Conference on Advanced Topics and Auto Tuning in High-Performance Scientific Computing (ATAT in HPSC 2017), March 12, 2017.
  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi. “User-defined Directive Translation using the Xevovler Framework,” 2017 SIAM Conference on Compuiter Science and Engineering (CSE17), Hilton Atlanta, Altanta, USA, February 27 – March 3, 2017.
  • Hiroyuki Takizawa, Hang Cui and Shoichi Hirasawa, “Performance Tuning with Machine Learning,” 25th Workshop on Sustained Simulation Performance, Sendai, March 13, 2017.
  • Ryusuke Egawa, “Toward Energy Efficient Operation of Next Generation Supercomputing Systems,” NUG,XXIX, Leuven, May 24, 2017.
  • Ryusuke Egawa, Masayuki Sato, Ryoma Saito, Hiroaki Kobayashi, “A Multiple-layer Bypass Mechanism for Energy Efficient Computing ,”26th Workshop on Sustained Simulation Performance (WSSP), Stuttgart, Sep. 10, 2017.

Presentations

  • Hiroyuki Takizawa, Reiji Suda, Daisuke Takahashi, Ryusuke Egawa, Fumihiko Ino, “Xevolver: expressing performance-awareness as user-defined code transformations,” JST/CREST International Symposium on Post Petascale System Software, Tokyo, 2017.

2016

Journal papers

  • Reiji Suda, Hiroyuki Takizawa, and Shoichi Hirasawa. Xevtgen: Fortran code transformer generator for high performance scientific codes. International Journal of Networking and Computing, 6(2):263-289, July 2016.
  • Kazuhiko Komatsu, Ryusuke Egawa, Shoichi Hirasawa, Hiroyuki Takizawa, Ken’Ichi Itakura, and Hiroaki Kobayashi. Translation of large-scale simulation codes for an OpenACC platform using the Xevolver framework. International Journal of Networking and Computing, 6(2):167-180, July 2016.
  • Raghunandan Mathur, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa and Hiroaki Kobayashi, “A Memory-Efficient Implementation of a Plasmonics Simulation Application on SX-ACE, International Journal of Networking and Computing, 6(2):243-262, July 2016.

International conference papers (with review)

  • Reiji Suda and Hiroyuki Takizawa. A software system supporting xml-based source-to-source code transformations on fortran programs. In The Fourth International Symposium on Computing and Networking, International Workshop on Legacy HPC Application Migration (LHAM2016), pages 1-7, 2016
  • Xiong Xiao, Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. The importance of dynamic load balancing among OpenMP thread teams for irregular workloads. In The Fourth International Symposium on Computing and Networking, International Workshop on Legacy HPC Application Migration (LHAM2016), pages 1-7, 2016.
  • Hiroyuki Takizawa, Daichi Sato, Shoichi Hirasawa, and Hiroaki Kobayashi. Making a legacy code auto-tunable witwith messing it up. In ACM/IEEE Supercomputing Conference 2016 (SC16), pages 1-2, 2016.
  • Masayuki Sato, Shin Nishimura, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A cache partitioning mechanism to protect shared data for CMPs. In IEEE COOL Chips XIX, pages 1-3, 2016.
  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A directive generation approach using user-defined rules. In The Fourth International Symposium on Computing and Networking, International Workshop on Legacy HPC Application Migration (LHAM2016), pages 1-7, 2016.
  • Yasuharu Hayashi, Hiroyuki Takizawa, and Hiroaki Kobayashi. A user-defined code transformation approach to overlapping mpi communication with computation. In The Fourth International Symposium on Computing and Networking, International Workshop on Legacy HPC Application Migration (LHAM2016), pages 1-7, 2016.
  • Cui Hang, Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A code selection mechanism using deep learning. In IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-16), pages 385-392, 2016.
  • Ryusuke Egawa, Wataru Uno, Masayuki Sato, Hiroaki Kobayashi, Jubee Tada, “A Power-Aware LLC Control Mechanism for 3D-Stacked Memory Subsystems,” In Proceedings of the IEEE International Conference on 3D System Integration (3DIC), pages 1 – 8, November 2016, USB.
  • Takuya Toyoshima, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi, “A Power-Performance Tradeoff of HBM by Limiting Access Channels,” In Poster Proceedings of IEEE Symposium on Low-Power and High-Speed Chips, April 2016.
  • Yuta Sakaguchi, Kenryo Kataumi, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Kazuhiko Komatsu, Ryusuke Egawa, Hiroaki Kobayashi, and Satoru Yamamoto. Performance optimization of numerical turbine for supercomputer sx-ace. In Proceedings of International Conference on Parallel Computational Fluid Dynamics, 2016.

Invited talks

  • Hiroyuki Takizawa, “Autotuning Meets Code Transformations – A Case Study of Xevolver Frame-
    work -,” The 24th Workshop on Sustained Simulation Performance, Stuttgart, December 6, 2016.
  • Kazuhiko Komatsu, “A directive generation using a code translation framework,” The 24th Workshop on Sustained Simulation Performance, Stuttgart, December 6, 2016.
  • Hiroyuki Takizawa, Takeshi Yamada, Takuya Tsunogawa, Shoichi Hirasawa, Hiroaki Kobayashi, “Performance Engineering of HPC Applications Based on Pattern Matching,” The 23rd Workshop on Sustained Simulation Performance, Sendai, March 16, 2016.
  • Hiroyuki Takizawa, Takeshi Yamada, Shoichi Hirasawa, Hiroaki Kobayashi, “Data Layout Optimization Using User-de ned Code Transformations,” Advanced Topics and Auto-Tuning in High-Performance Scienti c Computing 2016, National Taiwan University, Taipei, February 19, 2016.
  • Hiroyuki Takizawa, Daisuke Takahashi, Reiji Suda, and Ryusuke Egawa, “A Code Transformation Approach to Achieving High Performance Portability,” SPPEXA Annual Plenary Meeting, Leibniz Supercomputer Center, Munich, Germany, January 25, 2016.
  • Ryusuke Egawa, Yoko Isobe, Soya Fujimoto, Power and Performance Analysis of SX-ACE, The 24th Workshop on Sustained Simulation Performance, Stuttgart, December 6, 2016.

Books

  • Hiroyuki Takizawa, Takeshi Yamada, Shoichi Hirasawa, and Reiji Suda. A use case of a code transformation rule generator for data layout optimization. In Sustained Simulation Performance 2016, pages 21-30. Springer Berlin Heidelberg, 2016. ISBN 978-3-319-46735-1.
  • Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. An automatic performance tracking system for large-scale numerical applications. In Sustained Simulation Performance 2016, pages 119-127. Springer Berlin Heidelberg, 2016. ISBN 978-3-319-46735-1.
  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Directive Trans-
    lation for Various HPC Systems Using the Xevolver Framework. In Sustained Simulation Performance 2016, pages 109-11, Springer Berlin Heidelberg, 2016. ISBN 978-3-319-46735-1.

2015

Journal papers

  • Chunyan Wang, Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Identification and elimination of platform-specific code smells in high performance computing applications. International Journal of Networking and Computing, 5(1):180-199, 2015.
  • Hiroyuki Takizawa, Shoichi Hirasawa, Makoto Sugawara, Isaac Gelado, Hiroaki Kobayashi, and Wen mei W. Hwu. Optimized data transfers based on the OpenCL event management mechanism. Scientific Programming Journal, Volume 2015(Article ID 576498):1-16, 2015.
  • Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. FLEXII: A flexible insertion policy for dynamic cache resizing mechanisms. IEICE Transactions on Information and Systems, E98-C(7):550-558, July 2015.
  • Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A light-weight rollback mechanism for testing kernel variants in auto-tuning. IEICE Transactions on Information and Systems, E98-D(12):2178-2186, December 2015.

International conference papers (with review)

  • Takeshi Yamada, Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A case study of user-defined code transformations for data layout optimizations. In The Third International Symposium on Computing and Networking, International Workshop on Legacy HPC Application Migration (LHAM2015), pages 535-541, December 2015.
  • Chunyan Wang, Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Combining code refactoring and auto-tuning to improve performance portability of high-performance computing applications. In The Sixth International Conference on Computational Logics, Algebras, Programming, Tools, and Benchmarking (COMPUTATION TOOLS 2015), pages 20-26, 2015.
  • Hiroyuki Takizawa, Shoichi Hirasawa, Kazuhiko Komatsu, Ryusuke Egawa, and Hiroaki Kobayashi. Expressing system-awareness as code transformations for performance portability across diverse HPC systems. In International Workshop on Portability Among HPC Architectures for Scientific Applications 2015, pages 1-6, 2015.
  • Reiji Suda, Hiroyuki Takizawa, and Shoichi Hirasawa. Xevtgen: Fortran code transformer generator for high performance scientific codes. In The Third International Symposium on Computing and Networking, International Workshop on Legacy HPC Application Migration (LHAM2015), pages 528-534, December 2015.
  • Masayuki Sato, Chengguang Han, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. An energy-efficient dynamic memory address mapping mechanism. In IEEE COOL Chips XVIII, pages 1-3, 2015.
  • Kazuhiko Komatsu, Ryusuke Egawa, Yoko Isobe, Ryusei Ogata, Hiroyuki Takizawa, and Hiroaki Kobayashi. An approach to the highest efficiency of the HPCG benchmark on the SX-ACE supercomputer. In ACM/IEEE Supercomputing Conference 2015 (SC15), pages 1-2, 2015.
  • Kazuhiko Komatsu, Ryusuke Egawa, Shoichi Hirasawa, Hiroyuki Takizawa, Ken’Ichi Itakura, and Hiroaki Kobayashi. Migration of an atmospheric simulation code to an OpenACC platform using the Xevolver framework. In The Third International Symposium on Computing and Networking, International Workshop on Legacy HPC Application Migration (LHAM2015), pages 515-520, December 2015.
  • Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A veri cation framework for stream-lining empirical auto-tuning. In The Third International Symposium on Computing and Networking, International Workshop on Legacy HPC Application Migration (LHAM2015), pages 508-514, December 2015.
  • Alfian Amrizal, Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Automatic parameter tuning of hierarchical incremental checkpointing. In High Performance Computing for Computational Science (VECPAR 2014), volume 8969 of Lecture Notes in Computer Science, pages 298-309, 2015.

Invited talks

  • Hiroyuki Takizawa, Shoichi Hirasawa, and Reiji Suda “Xevtgen: automatic generation of code transformation rules based on before-and-after codes,” The 22nd Workshop on Sustained Simulation Performance, Stuttgart, Germany, December 17, 2015.
  • Kazuhiko Komatsu, “Migration of a large-scale code to an openacc platform using a code transformation framework,” The 22nd Workshop on Sustained Simulation Performance, Stuttgart, Germany, December 17, 2015.
  • Kazuhiko Komatsu. Performance portable code production using automatic parallelizing informa-
    tion. In The 1st IT Joint Seminar with Moscow State University, 2015.
  • Hiroyuki Takizawa, “Autotuning with user-defined code transformations,” Advanced Topics and Auto-Tuning in High-Performance Scienti c Computing 2015, National Taiwan University, Taipei, February 27, 2015.
  • Hiroyuki Takizawa, “What can we do to fight with system diversity?,” The 21st Workshop on Sustained Simulation Performance, Sendai, February 19, 2015.

Awards

  • Best Workshop Paper Award at The Third International Symposium on Computing and Networking (CANDAR’15), December, 2015.

Books

  • Hiroyuki Takizawa, Daichi Sato, Shoichi Hirasawa, and Hiroaki Kobayashi. A high-level interface of Xevolver for composing loop transformations. In Sustained Simulation Performance 2015, pages 137-145. Springer Berlin Heidelberg, 2015. ISBN 978-3-319-20340-9.
  • Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A data management policy for energy-efficient cache mechanisms. In Sustained Simulation Performance 2015, pages 61-75. Springer Berlin Heidelberg, 2015. ISBN 978-3-319-20340-9.
  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Performance evaluation of compiler-assisted OpenMP codes on various HPC systems. In Sustained Simulation Performance 2015, pages 147-157. Springer Berlin Heidelberg, 2015. ISBN 978-3-319-20340-9.

2014

Journal papers

  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Takashi Soga, Akihiro Musa, and Hiroaki Kobayashi. Exploring system architectures for next-generation CFD simulations in the postpeta-scale era. Journals of the Japan Society of Mechanical Engineers, 9(5):1-11, 2014.
  • Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. MVP-cache: A multi-banked cache memory for energy-efficient vector processing of multimedia applications. IEICE Transactions on Information and Systems, E97-D(11):2835-2843, 2014.

International conference papers (with review)

  • Xiong Xiao, Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. An approach to customization of compiler directives for application-speci c code transformations. In 2014 IEEE 8th International Symposium on Embedded Multicore SoCs (MCSoC), pages 99-106, 2014.
  • Chunyan Wang, Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Platform-speci c code smell alert system for high performance computing applications. In The 16th Workshop on Advances on Parallel and Distributed Processing Symposium (APDCM 2014), pages 652-661, 2014.
  • Hiroyuki Takizawa, Shoichi Hirasawa, Yasuharu Hayashi, Ryusuke Egawa, and Hiroaki Kobayashi. Xevolver: An XML-based code translation framework for supporting HPC application migration. In The 21st annual IEEE International Conference on High Performance Computing (HiPC 2014), 2014.
  • Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. On-chip checkpointing with 3D-stacked memories. In IEEE 3D System Integration Conference 2014, pages 1-6, 2014.
  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A compiler-assisted OpenMP migration method based on automatic parallelizing information. In International Supercomputing Conference 2014 (ISC’14), pages 450-459, 2014.
  • Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. An energy optimization method for vector processing mechanisms. In IEEE COOL Chips XVII, pages 1-3, 2014.
  • Ryusuke Egawa, Shintaro Momose, Kazuhiko Komatsu, Yoko Isobe, Hiroyuki Takizawa, Akihiro Musa, and Hiroaki Kobayashi. Early evaluation of the SX-ACE processor. In ACM/IEEE Supercomputing Conference 2014 (SC14), pages 1-2, 2014.

Invited talks

  • Hiroyuki Takizawa, “Xevolver: an extensible framework for user-de ned code transformation,” The 20th Workshop on Sustained Simulation Performance, Stuttgart, Germany, December 15, 2014.
  • Kazuhiko Komatsu, “High-productive openmp migration using automatic parallelizing information,” The 20th Workshop on Sustained Simulation Performance, Stuttgart, Germany, December 15, 2014.
  • Hiroyuki Takizawa, “Evolutionary adaptation of HPC applications to revolutionary system changes,” Young and bright HPC researcher’s talk at International Supercomputing Conference (ISC’14), June 24, 2014.
  • Hiroyuki Takizawa, Atsuya Uno, Yukinori Sato, Yasuharu Hayashi, Akihiro Yamashita, and Yasuhisa Masaoka, “HPC System for Memory-Intensive Applications: System Software,” The 19th Workshop on Sustained Simulation Performance, Sendai, March 27, 2014.
  • Kazuhiko Komatsu, “Performance comparison of auto-parallelized codes and openmp codes on vari-
    ous supercomputing systems,” The 19th Workshop on Sustained Simulation Performance, Sendai, March 27, 2014.
  • Hiroyuki Takizawa, Shoichi Hirasawa, and Hiroaki Kobayashi, “An Extensible Programming Framework for Custom Code Transformations,” 2014 Conference on Advanced Topics and Auto Tuning in High Performance Scienti c Computing, March 14-15, 2014.

Awards

Books

  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Performance evaluation of an OpenMP parallelization by using automatic parallelization information. In Sustained Simulation Performance 2014, pages 119-126. Springer Berlin Heidelberg, 2014. ISBN-13:978-3319106267.
  • Ryusuke Egawa, Kazuhiko Komatsu, and Hiroaki Kobayashi. Designing an HPC Refactoring
    Catalog Toward the Exa-scale Computing Era. In Sustained Simulation Performance 2014, Springer Berlin Heidelberg, 2014. ISBN-13:978-3319106267.

Presentation

2013

Journal papers

  • Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A capacity-aware thread scheduling method combined with cache partitioning to reduce inter-thread cache conflicts. IEICE Transactions on Information and Systems, E96-D(9):2047-2054, 2013.

International conference papers (with review)

  • Hiroyuki Takizawa, Makoto Sugawara, Shoichi Hirasawa, Isaac Gelado, Hiroaki Kobayashi, and Wen mei W. Hwu. clMPI: An OpenCL extension for interoperation with the message passing interface. In The 27th IEEE International Symposium on Parallel & Distributed Processing Workshops (IPDPSW2013), pages 1138-1148, 2013.
  • Hiroyuki Takizawa, Shoichi Hirasawa, and Hiroaki Kobayashi. Xevolver: an XML-based programming framework for software evolution. In ACM/IEEE Supercomputing Conference 2013 (SC13), pages 1-2, 2013.
  • Makoto Sugawara, Shoichi Hirasawa, Kazuhiko Komatsu, Hiroyuki Takizawa, and Hiroaki Kobayashi. A comparison of performance tunabilities between OpenCL and OpenACC. In 2013 IEEE 7th International Symposium on Embedded Multicore SoCs (MCSoC), pages 147-152, 2013.
  • Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A flexible insertion policy for dynamic cache resizing mechanisms. In IEEE COOL Chips XVI, pages 1-3, 2013.
  • Mamoru Miura, Kinya Fudano, Koichi Ito, Takafumi Aoki, Hiroyuki Takizawa, and Hiroaki Kobayashi. Performance evaluation of phase-based correspondence matching on GPUs. In SPIE Optical Engineering+ Applications. International Society for Optics and Photonics, volume 8856, pages 885614-1 – 885614-9, 2013.
  • Ye Gao, Naoki Shoji, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Design and evaluation of a media-oriented vector processor with a multi-banked cache memory. In The 11th IEEE/ACM Symposium on Embedded Systems for Real-Time Multimedia, pages 78-87, 2013.
  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Takashi Soga, Akihiro Musa, and Hiroaki Kobayashi. Design of the next-generation vector architecture for postpeta-scale cfd. In Proceedings of International Conference on Fluid Dynamics(ICFD2013), 11 2013.

Invited talks

  • Shoichi Hirasawa, Hiroyuki Takizawa, and Hiroaki Kobayashi, “An Automatic Performance Tracking System for Scienti c Software Evolution,” Conference on Advanced Topics and Auto Tuning in High Performance Scienti c Computing, National Taiwan University, Taipei, March 27-29, 2013.
  • Hiroyuki Takizawa, Alfi an Amrizal, Shoichi Hirasawa, Kazuhiko Komatsu, and Hiroaki Kobayashi, “Autotuning for Improving the Fault Tolerance of Large-scale Simulations,” Conference on Advanced Topics and Auto Tuning in High Performance Scienti c Computing, National Taiwan University, Taipei, March 27-29, 2013.
  • Kazuhiko Komatsu. Performance evaluation of auto-parallelized codes on various supercomputing systems. In 18th Workshop on Sustained Simulation Performance(WSSP18), 2013.

Awards

Books

  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Analysing the Performance Improvements of Optimizations on Modern HPC Systems. In Michael Resch, Xin Wang, Wolfgang Bez, Erich Forcht, and Hiroaki Kobayashi, editors, Sustained Simulation Performance 2013, Springer International Publishing, 2013.

Presentation

2012

Journal papers

International conference papers (with review)

  • Takumi Takai, Yusuke Tobo, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A bypass mechanism for way-adaptable caches. In IEEE COOL Chips XV, 2012.
  • Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A capacity-efficient insertion policy for dynamic cache resizing mechanisms. In ACM International Conference on Computing Frontiers 2012, pages 265-268, 2012.
  • Mamoru Miura, Kinya Fudano, Koichi Ito, Takafumi Aoki, Hiroyuki Takizawa, and Hiroaki Kobayashi. GPU implementation of phase-based stereo correspondence and its application. In International Conference on Image Processing, pages 1697-1700, 2012.
  • Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi, Shun Takahashi, Daisuke Sasaki, and Kazuhiro Nakahashi. Performance evaluation of BCM on various supercomputing systems. In The 24th International Conference on Parallel Computational Fluid Dynamics, pages 1-2, 2012.
  • Ye Gao, Naoki Shoji, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A media-oriented vector architectural extension with a high bandwidth cache system. In IEEE COOL Chips XV, pages 1-3, 2012.
  • Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. An out-of-order vector processing mechanism for multimedia applications. In ACM International Conference on Computing Frontiers 2012, pages 233-236, 2012.
  • Ryusuke Egawa, Yusuke Funaya, Ryu ichi Nagaoka, Yusuke Endo, Akihiro Musa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Effects of 3-D stacked vector cache on energy consumption. In IEEE 3D System Integration Conference 2012, pages 1-6, 2012.
  • Ryusuke Egawa, Yusuke Endo, Jubei Tada, Hiroyuki Takizawa, and Hiroaki Kobayashi. Exploring design space of a 3D stacked vector cache. In ACM/IEEE Supercomputing Conference 2012 (SC12), pages 1-2, 2012.
  • Alfian Amrizal, Shoichi Hirasawa, Kazuhiko Komatsu, Hiroyuki Takizawa, and Hiroaki Kobayashi.
    Improving the scalability of transparent checkpointing for GPU computing systems. In IEEE Region 10 Conference (TENCON 2012), pages 1-6, 2012.

Invited talks

  • Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi, “Toward High Performance-Portabilities on Modern HPC Systems,” The 16th Workshop on Sustained Simulation Performance, December 2012.
  • Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi, “Performance Evaluation of a CFD using Cartesian Meshes on Various Supercomputing Systems,” NUG XXIV, June 2012.
  • Hiroyuki Takizawa, “Software Evolution for System Architecture Revolution,” IEEE International Symposium on Embedded Multicore SoCs, September 21, 2012.
  • Kazuhiko Komatsu. Introduction to gpu computing. In SICE2012 Tutorial, 2012.
  • Hiroyuki Takizawa, “How can we help software evolution for post-Peta scale computing and beyond?” The 2nd AICS Symposium, March 2, 2012.

Awards

  • Best Poster Award at IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XV), April, 2012.

Books

  • Hiroyuki Takizawa, Ryusuke Egawa, Daisuke Takahashi, and Reiji Suda. HPC refactoring with hierarchical abstractions to help software evolution. In Michael Resch, Xin Wang, Wolfgang Bez, Erich Forcht, and Hiroaki Kobayashi, editors, Sustained Simualtion Performance 2012, pages 27-50. Springer Berlin Heidelberg, 2012. ISBN-13: 978-3642324536.
  • Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Performance evaluation of a next-generation CFD on various supercomputing systems. In Michael Resch, Xin Wang, Wolfgang Bez, Erich Forcht, and Hiroaki Kobayashi, editors, Sustained Simulation Performance 2012, pages 123-132. Springer Berlin Heidelberg, 2012. ISBN-13: 978-3642324536.

Presentation

2011

Journal papers

  • Ling Xu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A network clustering algorithm for sybil-attack resisting. IEICE Transactions on Information and Systems, E94-D(12):2345-2352, 2011.
  • Takashi Soga, Koki Okabe Akihiro Musa, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi, Shun Takahashi, Daisuke Sasaki, and Kazuhiro Nakahashi. Performance of SOR methods on modern vector and scalar processors. Computers & Fluid, 45(1):215-221, 2011.
  • Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi, Shun Takahashi, Daisuke Sasaki, and Kazuhiro Nakahashi. Parallel processing of the building-cube method on a GPU platform. Computers & Fluid, 45(1):122-128, 2011.
  • Tsutomo Inaba, Hiroyuki Takizawa, and Hiroaki Kobayashi. A self-organized overlay network management mechanism for heterogeneous environments. Journal of Information Processing, 19:25-38, 2011.

International conference papers (with review)

  • Jiali Yao, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A patch-based bit mask filtering method for micropolygon rasterization. In High-Performance Graphics (HPG), 2011.
  • Yusuke Tobo, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Power-aware insertion policy for the way-adaptable caches. In IEEE COOL Chips XIV, 2011.
  • Hiroyuki Takizawa, Kentaro Koyama, Katsuto Sato, Kazuhiko Komatsu, and Hiroaki Kobayashi. CheCL: Transparent checkpointing and process migration of opencl applications. In The 25th IEEE International Parallel and Distributed Processing Symposium (IPDPS2011), pages 864-876, 2011.
  • Katsuto Sato, Kazuhiro Komatsu, Hiroyuki Takizawa, and Hiroaki Kobayashi. A history-based performance prediction model with pro le data classi cation for automatic task allocation in hetero-geneous computing systems. In The 9th IEEE international symposium on Parallel and Distributed Processing with Applications (ISPA2011), pages 135-142, 2011.
  • Katsuto Sato, Kazuhiko Komatsu, Hiroyuki Takizawa, and Hiroaki Kobayashi. An automatic task assignment method for heterogeneous computing systems. In The 8th International Conference on Fluid Dynamics (ICFD2011), pages 1-2, 2011.
  • Akira Nukada, Hiroyuki Takizawa, and Satoshi Matsuoka. NVCR: A transparent checkpoint-restart library for NVIDIA CUDA. In The 25th IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW2011), pages 104-113, 2011.
  • Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi, Shun Takahashi, Daisuke Sasaki, and Kazuhiro Nakahashi. Performance of building cube method on various platforms. In The 8th International Conference on Flow Dynamics 2011 (ICFD2011), pages 1-2, 2011.

Invited talks

  • Hiroyuki Takizawa, “A new research project for enabling evolution of legacy code into massively-parallel heterogeneous computing applications,” The 14th Teraflop Workshop, December 5, 2011.

Awards

Books

  • Hiroyuki Takizawa, Ryusuke Egawa, and Hiroaki Kobayashi. A prototype implementation of OpenCL for SX vector systems. In Michael Resch, Xin Wang, Erich Forcht, Wlfgang Bez, Hiroaki Kobayashi, and Sabine Roller, editors, High Performance Computing on Vector Systems 2011, pages 41-50. Springer-Verlang, 2011. ISBN-13: 978-3642222436.

Presentations

2010

Journal paper

  • Ken’ichi Suzuki, Yoshiyuki Kaeriyama, Kazuhiko Komatsu, Ryusuke Egawa, Nobuaki Ohba, and Hiroaki Kobayashi. A fast ray-tracing using bounding spheres and frustum rays for dynamic scene rendering. IEICE Transactions on Information and Systems, E93-D(4):891-902, 2010.

International conference papers (with review)

  • Ling Xu, Satayapiwat Chainan, Hiroyuki Takizawa, and Hiroaki Kobayashi. Resisting sybil attack by social network and network clustering. In IEEE/IPSJ International Symposium on Applications and the Internet (SAINT2010), pages 15-21, 2010.
  • Yoshiei Sato, Ryuichi Nagaoka, Akihiro Musa, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, and Hiroaki Kobayashi. A performance tuning strategy under combining loop transforms for a vector processor with an on-chip cache. In ACM/IEEE Supercomputing Conference (SC10), 2010.
  • Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A voting-based working set assessment scheme for dynamic cache resizing mechanisms. In 28th IEEE International Conference on Computer Design (ICCD2010), pages 98-105, 2010.
  • Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A majority-based control scheme for way-adaptable caches. In Facing the Multicore-Challenge, Lecture Notes in Computer Science, pages 16-28, 2010.
  • Katsuto Sato, Kazuhiko Komatsu, Hiroyuki Takizawa, and Hiroaki Kobayashi. A runtime task
    reallocation library for heterogeneous computational environments. In Proceedings of International
    Conference on Flow Dynamics, 11 2010.
  • Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi, Shun Takahashi, Daisuke Sasaki, and Kazuhiro Nakahashi. Efficient data management for the building cube method using cartesian meshes on the gpu platform. In International Supercomputing Conference (ISC10), 2010.
  • Kazuhiko Komatsu, Katsuto Sato, Yusuke Arai, Kentaro Koyama, Hiroyuki Takizawa, and Hiroaki Kobayashi. Evaluating performance and portability of OpenCL programs. In The 5th international Workshop on Automatic Performance Tuning (iWAPT2010), pages 1-15, 2010. USB Memory.
  • Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A load-forwarding mechanism for the vector architecture in multimedia applications. In Euromicro Conference on Digital System Design (DSD 2010), pages 412-415, 2010.
  • Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Cache partitioning strategies for 3-d stacked vector processors. In IEEE 3D System Integration Conference 2010, pages 1-6, 2010. CD-ROM.
  • Ryusuke Egawa, Yusuke Funaya, Ryuichi Nagaoka, Akihiro Musa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Design and early evaluation of 3-D die stacked chip multi-vector processors. In IEEE 3D System Integration Conference 2010, pages 1-8, 2010. CD-ROM.

Invited talks

  • Hiroyuki Takizawa, “Towards OpenCL for SX,” The 13th Teraflop Workshop, Sendai, October 22, 2010.

Awards

Books

  • Katsuto Sato, Hiroyuki Takizawa, Kazuhiko Komatsu, and Hiroaki Kobayashi. Automatic tuning of CUDA execution parameters for stencil processing. In Ken Naono, Keita Teranishi, John Cavazos, and Reiji Suda, editors, Software Automatic Tuning: From Concepts to State-of-the-Art Results, pages 209-228. Springer-Verlang, 2010. ISBN13: 978-1441969347.

Presentations

2009

Journal papers

  • Noboru Yamada, Tomoaki Shinoda, and Hiroyuki Takizawa. Performance of hemisphere algorithm for fast form factor calculation. Heat Transfer Asian Research, 38(7):450-463, 2009.
  • Hong Wang, Hiroyuki Takizawa, and Hiroaki Kobayashi. A performance study of secure data
    mining on the Cell processor. International Journal of Grid and High-Performance Computing,
    1(2):30-44, 2009.
  • Hiroyuki Takizawa, Tatsuya Chida, and Hiroaki Kobayashi. Evaluating computational performance of backpropagation learning on graphics hardware. Electronic Note in Theoretical Computer Science, 225:379-389, 2009.
  • Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Characteristics of an on-chip cache on NEC SX vector architecture. Interdisciplinary Information Sciences, 15(1):51-66, 2009.

International conference papers (with review)

  • Hiroyuki Takizawa, Katsuto Sato, Kazuhiko Komatsu, and Hiroaki Kobayashi. CheCUDA: A checkpoint/restart tool for CUDA applications. In The 10th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT), pages 408-413, 2009.
  • Takashi Soga, Akihiro Musa, Youichi Shimomura, Ken’ichi Itakura, Koki Okabe, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Performance evaluation of NEC SX-9 using real science and engineering applications. In International Conference on High Performance Computing, Networking, Storage and Analysis (SC09), pages 1-12, 2009. USB Memory.
  • Yoshiei Sato, Ryuichi Nagaoka, Akihiro Musa, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, and Hiroaki Kobayashi. Performance tuning and analysis of future vector processors based on the roofline model. In The 10th ACM MEDEA Workshop, pages 7-14, 2009.
  • Masayuki Sato, Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A cache-aware thread scheduling policy for multi-core processors. In The IASTED International Conference on Parallel and Distributed Computing and Networks (PDCN2009), pages 109-114, 2009.
  • Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Early evaluation of a memory-stacked vector processor. In IEEE COOL Chips XII, page 165, 2009.
  • Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. 3D on-chip memory for the vector architecture. In IEEE 3D System Integration Conference 2009, pages 1-6, 2009. CD-ROM.

Invited talks

  • Hiroyuki Takizawa, “Hiding Programming Complexity for GPU Computing,” Suda laboratory GPGPU sperial seminar, University of Tokyo, June 11, 2009.

Awards

Books

  • Hiroaki Kobayashi, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Akihiro Musa, Takashi Soga, and Yoko Isobe. Lessons learned from 1-year experience with SX-9 and toward the next generation vector computing. In Sabine Roller, Katharina Benkert, Martin Galle, Wolfgang Bez, and Hiroaki Kobayashi, editors, High Performance Computing on Vector Systems 2009, pages 3-22. Springer-Verlang, 2009. ISBN 978-3-642-03913-3.

Presentations

2008

Journal papers

  • Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Power-aware dynamic cache partitioning for CMPs. Transactions on High-Performance Embedded Architectures and Compilers (HiPEAC), 3(2):149-167, 2008.
  • Kazuhiro Komatsu, Yoshiyuki Kaeriyama, Kenichi Suzuki, Hiroyuki Takizawa, and Hiroaki Kobayashi. A fast ray frustum-triangle intersection algorithm with precomputation and early termination. ACS, 1(1):85-95, 2008.

International conference papers (with review)

  • Ling Xu, Hirouyki Takizawa, and Hiroaki Kobayashi. A reliability model for result checking in volunteer computing. In The IEEE/IPSJ International Symposium on Applications and the Internet (SAINT2008), DAS-P2P 2008 Workshop, pages 201-204, 2008.
  • Masahide Tamura, Hiroyuki Takizawa, and Hiroaki Kobayashi. A parallel image generation algorithm based on photon map partitioning. In The 10th IASTED International Conference on Computer Graphics and Imaging (CGIM 2008), pages 145-151, 2008.
  • Hiroyuki Takizawa, Katsuto Sato, and Hiroaki Kobayashi. SPRAT: Runtime processor selection for energy-aware computing. In The IEEE CLUSTER 2008, international Workshop on Automatic Performance Tuning (iWAPT 2008), pages 386-393, 2008.
  • Chainan Satayapiwat, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A utility-based double auction mechanism for efficient grid resource allocation. In The 2008 IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA2008), pages 252-260, 2008.
  • Akihiro Musa, Yoshiei Sato, Takeshi Soga, Koki Okabe, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A shared cache for a chip multi vector processor. In The 9th ACM MEDEA Workshop, pages 24-29, 2008.
  • Akihiro Musa, Yoshiei Sato, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, and Hiroaki Kobayashi. Effects of MSHR and prefetch mechanism on an on-chip caches of the vector architecture. In The 2008 IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA2008), pages 252-260, 2008.
  • Akihiro Musa, Yoshiei Sato, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, and Hiroaki Kobayashi. Caching on a chip multi vector processor. In ACM/IEEE Supercomputing Conference (SC08), 2008.
  • Yoshitomo Murata, Tsutomu Inaba, Hiroyuki Takizawa, and Hiroaki Kobayashi. Implementation and evaluation of a distributed and cooperative load-balancing mechanism for dependable volunteer computing. In The 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN2008), pages 316-325, 2008.
  • Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. Modeling of cache access behavior based on Zipf’s law. In The 9th ACM MEDEA Workshop, pages 9-15, 2008.
  • Kazuhiko Komatsu, Hiroyuki Takizawa, and Hiroaki Kobayashi. Hierarchical parallel processing of ray tracing on a cell cluster. In The 1st International Workshop on Super Visualization (IWSV08), pages 1-8, 2008. CD-ROM.
  • Kazuhiko Komatsu, Yoshiyuki Kaeriyama, Kenichi Suzuki, Hiroyuki Takizawa, and Hiroaki Kobayashi. An efficient intersection algorithm design of ray tracing for many-core graphics processors. In The 10th IASTED International Conference on Computer Graphics and Imaging (CGIM 2008), pages 165-171, 2008.
  • Tsutomu Inaba, Yoshitomo Murata, Hiroyuki Takizawa, and Hiroaki Kobayashi. Consideration of resource access history for optimizing overlay networks in P2P-based resource discovery. In The IEEE/IPSJ International Symposium on Applications and the Internet (SAINT2008), Middleware Workshop, pages 269-272, 2008.

Invited talks

Awards

Books

  • Hiroaki Kobayashi, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Akihiro Musa, Takashi Soga, and Yoichi Shimomura. First experiences with NEC SX-9. In Sabine Roller, Katharina Benkert, Martin Galle, Wolfgang Bez, Hiroaki Kobayashi, and Tohio Hirayama, editors, High Performance Computing on Vector Systems 2008, pages 3-11. Springer-Verlang, 2008. ISBN 978-3-540-85868-3.

Presentations

2007

Journal papers

  • Hong Wang, Hiroyuki Takizawa, and Hiroaki Kobayashi. A dependable peer-to-peer computing platform. Future Generation Computer Systems, 23:939-955, 2007.
  • Hiroyuki Takizawa and Hiroaki Kobayashi. Partial distortion entropy maximization for online data clustering. Neural Networks, 20(7):819-831, 2007.
  • Tomoyuki Saoi, Hiroyuki Takizawa, and Hiroaki Kobayashi. A progressive 3-D meshing algorithm for interactive simulation of soft bodies. INFORMATION, 10(6):761-776, 2007.
  • Hiroaki Kobayashi, Hiroyuki Takizawa, Takuro Okawa, and Tsutomu Inaba. An efficient control mechanism for self-organizing overlay networks of large-scale P2P systems. Interdisciplinary Information Sciences, 13(2):227-237, 2007.

International conference papers

  • Hong Wang, Hiroyuki Takizawa, and Hiroaki Kobayashi. An estimation-based redundant task dispatch policy for volunteer computing platforms. In The International Conference on Dependable Systems and Networks, pages 348-349, 2007.
  • Hiroyuki Takizawa, Hiroki Shiratori, and Hiroaki Kobayashi. Preliminary evaluation for runtime auto-tuning of gpgpu applications. In The 2nd International Workshop on Automatic Performance Tuning, page 37, 2007.
  • Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, and Hiroaki Kobayashi. An on-chip cache design for vector processors. In The 8th ACM MEDEA workshop, pages 17-23, 2007.
  • Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, and Hiroaki Kobayashi. Early evaluation of on-chip vector caching for the NEC SX vector architecture. In ACM/IEEE Supercomputing Conference (SC07), 2007.
  • Isao Kotera, Hiroyuki Takizawa, and Hiroaki Kobayashi. A fair-sharing and power-aware l2 cache system for chip multiprocessors. In IEEE COOL Chips X, 2007.
  • Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, and Hiroaki Kobayashi. A power-aware shared cache mechanism on locality assessment of memory reference for CMPs. In The 8th ACM MEDEA workshop, pages 121-128, 2007.
  • Kosuke Ikeda, Hiroyuki Takizawa, and Hiroaki Kobayashi. A memory efficient scheme for fast spectral photon mapping. In The 9th IASTED International Conference on Computer Graphics and Imaging (CGIM 2007), pages 1-6, 2007. CD-ROM.

Invited talks

  • Hiroyuki Takizawa, “Potential of a Public Supercomputer for Large-Scale Data Processing – Poor-Person’s HPC or Valuable Green Computing?,” Panel Discussion of Large Data Handling, SC’07 BOF, Nov. 14, 2007.

Awards

Books

  • Hiroaki Kobayashi, Akihiro Musa, Yoshiei Sato, Hiroyuki Takizawa, and Koki Okabe. The potential of on-chip memory systems for future vector architectures. In Michael Resch, Sabine Roller, Peter Lammers, Toshiyuki Furui, and Wolfgang Bez, editors, High Performance Computing on Vector Systems 2007, pages 247-264. Springer-Verlang, 2007. ISBN 978-3-540-74383-5.

Presentations

2006

Journal

  • Hiroyuki Takizawa and Hiroaki Kobayashi. Hierarchical parallel processing of large scale data clustering on a PC cluster with GPU co-processing. The Journal of Supercomputing, 36:219-234, 2006.

International conferences (with review)

  • Hiroyuki Takizawa and Hiroaki Kobayashi. Towards effective gpu implementation of neural networks. In The 4th International Conference on Information-MFCSIT’06, pages 1-4, 2006.
  • Hiroyuki Takizawa and Hiroaki Kobayashi. Radiative heat transfer simulation using programmable graphics hardware. In The 5th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2006), pages 29-36, 2006.
  • Akihiro Musa, Hiroyuki Takizawa, Koki Okabe, Takashi Soga, and Hiroaki Kobayashi. Implications of memory performance for highly efficient supercomputing of scienti c applications. In The 4th International Symposium on Parallel and Distributed Processing and Applications (ISPA2006), number 4330 in Lecture Notes in Computer Science, pages 845-858, 2006.
  • Yoshitomo Murata, Tsutomu Inaba, Hiroyuki Takizawa, and Hiroaki Kobayashi. A distributed
    and cooperative load balancing mechanism for large-scale P2P systems. In The IEEE/IPSJ International Symposium on Applications and the Internet Workshops (SAINT2006 Workshop), pages 126-129, 2006.
  • Tsutomu Inaba, Takuro Ohkawa, Yoshitomo Murata, Hiroyuki Takizawa, and Hiroaki Kobayashi. Design and implementation of an efficient search mechanism based on the hybrid P2P model for ubiquitous grid computing systems. In The IEEE/IPSJ International Symposium on Applications and the Internet (SAINT2006), pages 45-53, 2006.

Invited talks

Awards

Books

Presentations

2005

Journal papers

  • Hiroyuki Takizawa and Hiroaki Kobayashi. Evaluation of large-scale remote interactive visualization via Super SINET. INFORMATION, 8(3):383-390, 2005.
  • Hiroaki Kobayashi, Isao Kotera, and Hiroyuki Takizawa. Locality analysis to control dynamically way-adaptable caches. ACM SIGARCH Computer Architecture News, 33(3):25-32, 2005.

International conference papers (with review)

  • Hong Wang, Hiroyuki Takizawa, and Hiroaki Kobayashi. A workflow management mechanism for peer-to-peer computing platforms. In The 3rd International Symposium on Parallel and Distributed Processing and Applications (ISPA2005), number 3758 in Lecture Notes in Computer Science, pages 827-832, 2005.
  • Hiroaki Kobayashi, Hiroyuki Takizawa, Tsutomu Inaba, and Yasuaki Takizawa. A self-organizing overlay network to exploit the locality of interests for effective resource discovery in P2P systems. In The IEEE/IPSJ International Symposium on Applications and the Internet (SAINT2005), pages 246-255, 2005.
  • Kosuke Ikeda, Hiroyuki Takizawa, and Hiroaki Kobayashi. An incremental photon-mapping algorithm for fast walk-through animations. In The 8th IASTED International Conference on Computer Graphics and Imaging (CGIM 2005), pages 1-7, 2005. CD-ROM.

Invited talks

Awards

Books

Presentations

2004

Journal papers

  • Kentaro Sano, Shintaro Momose, Hiroyuki Takizawa, Hiroaki Kobayashi, and Tadao Nakamura. Efficient parallel processing of competitive learning algorithms. Parallel Computing, 30(12):1361-1383, 2004.

International conference papers (with review)

  • Hiroyuki Takizawa and Hiroaki Kobayashi. Multi-grain parallel processing of data clustering on programmable graphics hardware. In The 2nd International Symposium on Parallel and Distributed Processing and Applications (ISPA’04), number 3358 in Lecture Notes in Computer Science, pages 16-27, 2004.
  • Hiroyuki Takizawa and Hiroaki Kobayashi. A fast computation scheme of partial distortion entropy updating. In The International Conference on Information Technology (ITCC 2004), volume 1, pages 736-741, 2004.
  • Hiroyuki Takizawa and Hiroaki Kobayashi. Evaluation of large-scale remote interactive visualization via Super SINET. In The 3rd International Conference on Information (INFO’2004), pages 456-459, 2004.
  • Hiroyuki Takizawa and Hiroaki Kobayashi. An effective implementation of vector quantization encoder on commodity graphics hardware. In The 2nd International Conference on Information Technology and Applications (ICITA2004), pages 1-6, 2004. CD-ROM.

Invited talks

Awards

  • Best Paper Award at the 2nd IEEE/ACM/IPSJ International Symposium on Parallel and Distributed Processing and Applications (ISPA’04), December, 2004.

Books

Presentations

2003

Journal paper

  • Hiroyuki Takizawa, Kentaro Sano, Taira Nakajima, Hiroaki Kobayashi, and Tadao Nakamura. Vector quantization codebook design using the Law-of-the-Jungle algorithm. IEICE Transactions on Information and Systems, E86-D(6):1068-1077, 2003.

International conference papers

  • Hiroyuki Takizawa, Taira Nakajima, Kentaro Sano, Hiroaki Kobayashi, and Tadao Nakamura. A comparison study of vector quantization codebook design algorithms based on the equidistortion principle. In The 21st IASTED International Multi-Conference on Applied Informatics (AI2003), pages 255-261, 2003.
  • Hiroyuki Takizawa. A decision criterion to relocate codewords for adaptive vector quantization. In The 21st IASTED International Multi-Conference on Applied Informatics (AI2003), pages 262-268, 2003.

Invited talks

Awards

Books

Presentations