Event

Hello! This is Koda of B4.

The Henepata seminar, a joint effort between Takizawa Laboratory and Kobayashi/Sato Laboratory, was recently completed.
The Henepata Seminar is a seminar in which we read the book “Composition and Design of Computers” written by Patterson and Hennessy and present the contents of the book.

This year, three B4 students from Takizawa Laboratory and seven B4 and M1 students from Kobayashi Laboratory participated in the seminar and discussed the basics of computer configuration.
In addition, professors and senior students gave us advice on our presentations and supplemented the content to deepen our understanding.

I am determined to make use of the basic computer knowledge I learned this time and do my best in my future research activities!

Nice to meet you!
I am Daiki Nakai, a first-year master’s student at Tohoku Graduate School.
As it is the Corona Disaster, the open campus is now online.
The dates and times are 10:00~17:00 on 7/27 and 7/28.
If you want to hear real voices of current students, please feel free to join us!
Click hereto participate
pass is “superlab”.

Hello there. This is Aoyagi.
Recently a new server was installed in our laboratory. This server will be equipped with GPUs and VEs, and will be used for research.
Due to its similarity in size and use purpuse, it was named “muffin2” after “muffin”, the server which was installed last year.
Let’s see inside our new mate. You can see there are a lot of memory slots, actually 32 slots. In the picture below, you can see 8 slots are taken already.
But the main memory reaches 128G byte already. If we install memories to the rest 24 slots it would be possible to produce “a beast” with 1T byte main memory.
I’m really looking forward to seeing the day!

Hello. My name is Kaneko, a second-year master’s student.

Just a few days ago, “neoSYCL”, an original SYCL implementation developed in this laboratory, was released!

SYCL is a standard developed by the Khronos Group for writing code for heterogeneous architectures.
There are several implementations of SYCL, as described here.
Among them, neoSYCL is the only implementation that supports CPU and NEC’s SX-Aurora TSUBASA (SX-AT) as a processor.

With neoSYCL, processing in heterogeneous systems containing SX-ATs can be written in a single-source program using standard C++.
Please check the neoSYCL page on GitHub for more information.

In addition to SX-AT, my research has also created an extension library to support Intel Field Programmable Gate Array (FPGA), which I plan to research and implement so that it can be published on GitHub.

Hello, this is Ishii of M1.
Summer is gradually approaching, and I am wondering whether I should wear a parka or a short-sleeved one.

In this season, three new third-year students and a research student have arrived at Takizawa Lab. We held a welcome party for them online, so here is a report on it.
This welcome party was also held online, but we would like to do it offline soon…
I hope we can create an environment where the newcomers can feel comfortable. I look forward to working with you from now on!

Hi, this is D1 student Jin Yifan.

The 25th IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL Chips 25) was successfully held during April 20-22, 2022.

IEEE COOL Chips is an International Symposium initiated in 1998 to present the advancement of low-power and high-speed chips and systems.
The symposium covers leading-edge technologies in all areas of microprocessors and their applications.
Researchers from around the world participated in this symposium in a hybrid format (on-site in Tokyo and online).
The program is shown here.

I was privileged to be able to present my work as a poster at this symposium.

In fact, because of the epidemic, this was the first time I had the opportunity to participate in this type of academic conference on-site.
I met many enthusiastic researchers and had interesting and valuable discussions with them.

Hello, my name is Ishii, and I started my first year as a master’s student in the spring.

I was interested in the LINE API, so I created an official LINE that can manage access control. It is designed to record entry and exit times and reflect them in a spreadsheet.
I made this line as a personal hobby, and I am very grateful that my lab is able to use it. I have a desire to create various things, so I will continue to enjoy creating something in the future.

Hi, I am Prof. Takizawa. I was invited to various venues as a speaker this academic year. This is clear evidence that our lab is very active and all the lab members have been working hard!

It is difficult to post every presentation to this web site, so I would like to list major presentations I did in the second half of this academic year.

• 2021/11/26: The Current Situation and Future Outlook of Supercomputers (in Japanese) @ Microwave Workshop and Exhibition (MWE2021).
• 2021/12/08: An Update on neoSYCL @ Khronos SYCL Webinar.
• 2021/12/09: Operation and Future of Supercomputer AOBA (in Japanese) @ PC Cluster Consortium Symposium (PCCC21).
• 2021/12/13: One-year experience of operating SX-Aurora TSUBASA and future outlook @ 32nd Workshop on Sustained Simulation Performance (WSSP32).
• 2021/12/16: One-year operation of an SX-Aurora TSUBASA system, Supercomputer AOBA @ NEC Aurora Forum.
• 2021/12/19: Fighting with the Complexity and Diversity of Future HPC Systems (Keynote) @ Parallel and Distributed Computing, Applications, and Technologies (PDCAT 2021).
• 2022/01/14: SYCL programming for collaboration of x86 and friends @ The Intel eXtreme Performance Users Group (IXPUG) Workshop.
• 2022/03/29: A data-driven approach for making better use of compilers @ Conference on Advance Topics and Auto Tuning in High Performance Scientific Computing (ATAT2022).

Hello there. This is Li Jiahao.

22nd International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT) was held from Dec. 17th to 19th. PDCAT is a major forum for scientists, engineers, and practitioners throughout the world to present the latest research, results, ideas, developments and applications in all areas of parallel and distributed computing.

I made a presentation about the performance of neoSYCL.